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Practical Low Power Digital VLSI Design
Gary K. Yeap
€ 220.13
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Description for Practical Low Power Digital VLSI Design
Paperback. Num Pages: 212 pages, black & white illustrations, bibliography. BIC Classification: THR; TJFC. Category: (G) General (US: Trade). Dimension: 235 x 155 x 12. Weight in Grams: 361.
Practical Low Power Digital VLSI Design emphasizes the optimization and trade-off techniques that involve power dissipation, in the hope that the readers are better prepared the next time they are presented with a low power design problem. The book highlights the basic principles, methodologies and techniques that are common to most CMOS digital designs. The advantages and disadvantages of a particular low power technique are discussed. Besides the classical area-performance trade-off, the impact to design cycle time, complexity, risk, testability and reusability are discussed. The wide impacts to all aspects of ... Read more
Practical Low Power Digital VLSI Design emphasizes the optimization and trade-off techniques that involve power dissipation, in the hope that the readers are better prepared the next time they are presented with a low power design problem. The book highlights the basic principles, methodologies and techniques that are common to most CMOS digital designs. The advantages and disadvantages of a particular low power technique are discussed. Besides the classical area-performance trade-off, the impact to design cycle time, complexity, risk, testability and reusability are discussed. The wide impacts to all aspects of ... Read more
Product Details
Format
Paperback
Publication date
2012
Publisher
Springer-Verlag New York Inc. United States
Number of pages
212
Condition
New
Number of Pages
212
Place of Publication
New York, NY, United States
ISBN
9781461377788
SKU
V9781461377788
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
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