Offset Reduction Techniques in High-Speed Analog-to-Digital Converters
Figueiredo, Pedro M.; Vital, Joao C.
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Description for Offset Reduction Techniques in High-Speed Analog-to-Digital Converters
Paperback. This volume analyzes, describes the design, and presents test results of Analog-to-Digital Converters employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The authors review the pros and cons of each one. Series: Analog Circuits and Signal Processing. Num Pages: 402 pages, biography. BIC Classification: TJFC; UT. Category: (P) Professional & Vocational. Dimension: 234 x 156 x 21. Weight in Grams: 617.
Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.
Product Details
Format
Paperback
Publication date
2010
Publisher
Springer Netherlands
Number of pages
402
Condition
New
Series
Analog Circuits and Signal Processing
Number of Pages
382
Place of Publication
Dordrecht, Netherlands
ISBN
9789048181926
SKU
V9789048181926
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
About Figueiredo, Pedro M.; Vital, Joao C.
Pedro Figueiredo received the degrees of Licenciado and Doutor (PhD) in Electrical and Computer Engineering in 1999 and 2006, respectively, from the Instituto Superior Técnico (IST), Lisbon, Portugal. From 1997 to 1999, he was with the Analog and Mixed-Mode Circuits Group in the Institute for Systems and Computer Engineering (INESC), Lisbon, Portugal, where he worked on low-noise logic families and ... Read more
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