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Integrated System-level Modeling of Network-on-chip Enabled Multi-processor Platforms
Kogel, Tim; Leupers, Rainer; Meyr, Heinrich
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Description for Integrated System-level Modeling of Network-on-chip Enabled Multi-processor Platforms
Hardback. Describes various developments in the area of SoC platforms and ESL design methodologies. This book presents a set of tools for the creation and exploration of timing approximate SoC platform models. Num Pages: 186 pages, biography. BIC Classification: UM. Category: (P) Professional & Vocational. Dimension: 297 x 210 x 14. Weight in Grams: 482.
We are presently observing a paradigm change in designing complex SoC as it occurs roughly every twelve years due to the exponentially increasing number of transistors on a chip. This design discontinuity, as all previous ones, is characterized by a move to a higher level of abstraction. This is required to cope with the rapidly increasing design costs. While the present paradigm change shares the move to a higher level of abstraction with all previous ones, there exists also a key difference. For the ?rst time shrinking geometries do not leadtoacorrespondingincreaseofperformance. InarecenttalkLisaSuofIBM pointed out that in 65nm technology only about ... Read more
We are presently observing a paradigm change in designing complex SoC as it occurs roughly every twelve years due to the exponentially increasing number of transistors on a chip. This design discontinuity, as all previous ones, is characterized by a move to a higher level of abstraction. This is required to cope with the rapidly increasing design costs. While the present paradigm change shares the move to a higher level of abstraction with all previous ones, there exists also a key difference. For the ?rst time shrinking geometries do not leadtoacorrespondingincreaseofperformance. InarecenttalkLisaSuofIBM pointed out that in 65nm technology only about ... Read more
Product Details
Format
Hardback
Publication date
2006
Publisher
Springer-Verlag New York Inc. United States
Number of pages
186
Condition
New
Number of Pages
186
Place of Publication
New York, NY, United States
ISBN
9781402048258
SKU
V9781402048258
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
Reviews for Integrated System-level Modeling of Network-on-chip Enabled Multi-processor Platforms
From the reviews: "The book covers most of the major areas of system-level design and modeling, and much of the work described has been incorporated into a commercial ESL tool … . This book’s scope and range of pragmatic ideas make it valuable for a wide audience. … When combined with the extensive list of ... Read more