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Zhan, Naijun; Wang, Shuling; Zhao, Hengjun - Formal Verification of Simulink/Stateflow Diagrams - 9783319470146 - V9783319470146
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Formal Verification of Simulink/Stateflow Diagrams

€ 150.55
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Description for Formal Verification of Simulink/Stateflow Diagrams Hardback. Num Pages: 273 pages, 14 black & white illustrations, 60 colour illustrations, 50 colour tables, biography. BIC Classification: TJFC; UYF. Category: (P) Professional & Vocational. Dimension: 235 x 155 x 18. Weight in Grams: 578.
This book presents a state-of-the-art technique for formal verification of continuous-time Simulink/Stateflow diagrams, featuring an expressive hybrid system modelling language, a powerful specification logic and deduction-based verification approach, and some impressive, realistic case studies.  Readers will learn the HCSP/HHL-based deductive method and the use of corresponding tools for formal verification of Simulink/Stateflow diagrams. They will also gain some basic ideas about fundamental elements of formal methods such as formal syntax and semantics, and especially the common techniques applied in formal modelling and verification of hybrid systems. By investigating the successful case studies, readers will realize how to apply the pure ... Read more

Product Details

Format
Hardback
Publication date
2016
Publisher
Springer International Publishing AG Switzerland
Number of pages
273
Condition
New
Number of Pages
258
Place of Publication
Cham, Switzerland
ISBN
9783319470146
SKU
V9783319470146
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15

About Zhan, Naijun; Wang, Shuling; Zhao, Hengjun
Dr. Naijun Zhan is a research professor at State Key Lab. of Computer Science, Institute of Software, Chinese Academy of Sciences. He obtained PhD in computer science from Institute of Software, Chinese Academy of Sciences in 2000, and Ms.c in computer science and Bs.c in mathematical logic both from Nanjing University respectively in 1996 and in 1993. Prior to join ... Read more

Reviews for Formal Verification of Simulink/Stateflow Diagrams
“The book is an enjoyable reading and provides a thorough overview of the verification of embedded systems using Simulink and Stateflow as advertised by the title. The book provides the mathematical foundations as well as real-world applications of the presented approaches and can easily be appreciated by most graduates of computer science.” (Andreas Maletti, zbMath 1412.68006, 2019)

Goodreads reviews for Formal Verification of Simulink/Stateflow Diagrams


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