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Eduard Cerny - SVA: The Power of Assertions in SystemVerilog - 9783319071381 - V9783319071381
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SVA: The Power of Assertions in SystemVerilog

€ 199.41
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Description for SVA: The Power of Assertions in SystemVerilog Hardback. Num Pages: 609 pages, 173 black & white illustrations, 25 black & white tables, biography. BIC Classification: TJFC; UYF. Category: (P) Professional & Vocational. Dimension: 242 x 163 x 38. Weight in Grams: 1050.

This book is a comprehensive guide to assertion-based verification of hardware designs using System Verilog Assertions (SVA). It enables readers to minimize the cost of verification by using assertion-based techniques in simulation testing, coverage collection and formal analysis. The book provides detailed descriptions of all the language features of SVA, accompanied by step-by-step examples of how to employ them to construct powerful and reusable sets of properties. The book also shows how SVA fits into the broader System Verilog language, demonstrating the ways that assertions can interact with other System Verilog components. The reader new to hardware verification will benefit from ... Read more

System Verilog standard, explaining in detail the new and enhanced assertion constructs. The book makes SVA usable and accessible for hardware designers, verification engineers, formal verification specialists and EDA tool developers. With numerous exercises, ranging in depth and difficulty, the book is also suitable as a text for students.

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Product Details

Publisher
Springer International Publishing AG
Format
Hardback
Publication date
2014
Condition
New
Weight
1050g
Number of Pages
590
Place of Publication
Cham, Switzerland
ISBN
9783319071381
SKU
V9783319071381
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15

About Eduard Cerny
Eduard Cerny received M.Eng. and Ph.D. degrees in electrical engineering from McGill University, Montreal, in 1970 and 1975, respectively. From 1978 until 2001 he was a professor in the Department Computer Science and Operations Research at the Universite de Montreal. He published and was a consultant in areas related to the specification, simulation, formal verification and test of microelectronics systems ... Read more

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