Stock image for illustration purposes only - book cover, edition or condition may vary.
Formal Methods for Hardware Verification
Marco Bernardo
€ 66.08
FREE Delivery in Ireland
Description for Formal Methods for Hardware Verification
Paperback. Presents 8 papers accompanying the lectures of leading researchers given at the 6th edition of the International School on Formal Methods for the Design of Computer, Communication and Software Systems (SFM 2006). Series: Lecture Notes in Computer Science. Num Pages: 252 pages, biography. BIC Classification: UYD. Category: (P) Professional & Vocational. Dimension: 234 x 156 x 13. Weight in Grams: 800.
This book presents 8 papers accompanying the lectures of leading researchers given at the 6th edition of the International School on Formal Methods for the Design of Computer, Communication and Software Systems (SFM 2006). SFM 2006 was devoted to formal techniques for hardware verification and covers several aspects of the hardware design process, including hardware design languages and simulation, property specification formalisms, automatic test pattern generation, symbolic trajectory evaluation, and more.
This book presents 8 papers accompanying the lectures of leading researchers given at the 6th edition of the International School on Formal Methods for the Design of Computer, Communication and Software Systems (SFM 2006). SFM 2006 was devoted to formal techniques for hardware verification and covers several aspects of the hardware design process, including hardware design languages and simulation, property specification formalisms, automatic test pattern generation, symbolic trajectory evaluation, and more.
Product Details
Format
Paperback
Publication date
2006
Publisher
Springer-Verlag Berlin and Heidelberg GmbH & Co. KG Germany
Number of pages
252
Condition
New
Series
Lecture Notes in Computer Science
Number of Pages
244
Place of Publication
Berlin, Germany
ISBN
9783540343042
SKU
V9783540343042
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
Reviews for Formal Methods for Hardware Verification