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Formal Semantics for VHDL
. Ed(S): Delgado Kloos, Carlos; Breuer, P.T.
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Description for Formal Semantics for VHDL
Paperback. Editor(s): Delgado Kloos, Carlos; Breuer, P.T. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 249 pages, biography. BIC Classification: THR; TJFC; UK; UMA. Category: (P) Professional & Vocational. Dimension: 240 x 160 x 14. Weight in Grams: 433.
It is recognized that formal design and verification methods are an important requirement for the attainment of high quality system designs. The field has evolved enormously during the last few years, resulting in the fact that formal design and verification methods are nowadays supported by several tools, both commercial and academic.
If different tools and users are to generate and read the same language then it is necessary that the same semantics is assigned by them to all constructs and elements of the language. The current IEEE standard VHDL language ... Read more
It is recognized that formal design and verification methods are an important requirement for the attainment of high quality system designs. The field has evolved enormously during the last few years, resulting in the fact that formal design and verification methods are nowadays supported by several tools, both commercial and academic.
If different tools and users are to generate and read the same language then it is necessary that the same semantics is assigned by them to all constructs and elements of the language. The current IEEE standard VHDL language ... Read more
Product Details
Format
Paperback
Publication date
2012
Publisher
Springer-Verlag New York Inc. United States
Number of pages
249
Condition
New
Series
The Springer International Series in Engineering and Computer Science
Number of Pages
249
Place of Publication
New York, NY, United States
ISBN
9781461359418
SKU
V9781461359418
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
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