.png){kind=logo}
Stock image for illustration purposes only - book cover, edition or condition may vary.
Hardware Acceleration of EDA Algorithms
Gulati, Kanupriya; Khatri, Sunil P.
€ 131.75
FREE Delivery in Ireland
Description for Hardware Acceleration of EDA Algorithms
Hardback. This text covers the acceleration of EDA algorithms using hardware platforms such as FPGAs and GPUs. In it, widely applied CAD algorithms are evaluated and compared for potential acceleration on FPGAs and GPUs. Num Pages: 192 pages, 20 black & white tables, biography. BIC Classification: TJFC; UGC. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 244 x 166 x 12. Weight in Grams: 478.
Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees ... Read more
Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees ... Read more
Product Details
Format
Hardback
Publication date
2010
Publisher
Springer-Verlag New York Inc. United States
Number of pages
192
Condition
New
Number of Pages
192
Place of Publication
New York, NY, United States
ISBN
9781441909435
SKU
V9781441909435
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
Reviews for Hardware Acceleration of EDA Algorithms