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Logic Minimization Algorithms for VLSI Synthesis
Brayton, Robert K.; Hachtel, Gary D. (University Of Colorado); McMullen, C.; Sangiovanni-Vincentelli, Alberto L.
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Description for Logic Minimization Algorithms for VLSI Synthesis
Paperback. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 194 pages, biography. BIC Classification: PBKS; THR; UGC. Category: (G) General (US: Trade). Dimension: 235 x 155 x 11. Weight in Grams: 326.
The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects, the impor tance of logic minimization for the synthesis of area and performance effective circuits clearly emerged. In 1980, Richard Newton stirred our interest by pointing out new heuristic algorithms for two-level logic minimization and the potential for improving upon existing approaches. In the summer of 1981, the authors organized and participated in a seminar on ... Read more
The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects, the impor tance of logic minimization for the synthesis of area and performance effective circuits clearly emerged. In 1980, Richard Newton stirred our interest by pointing out new heuristic algorithms for two-level logic minimization and the potential for improving upon existing approaches. In the summer of 1981, the authors organized and participated in a seminar on ... Read more
Product Details
Format
Paperback
Publication date
2011
Publisher
Springer-Verlag New York Inc. United States
Number of pages
194
Condition
New
Series
The Springer International Series in Engineering and Computer Science
Number of Pages
194
Place of Publication
New York, NY, United States
ISBN
9781461297840
SKU
V9781461297840
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
Reviews for Logic Minimization Algorithms for VLSI Synthesis
`In short, a quite remarkable realization in the field.' Zentrallblatt für Mathematik (1986)