.png){kind=logo}
Stock image for illustration purposes only - book cover, edition or condition may vary.
High-Level Verification
Kundu, Sudipta; Lerner, Sorin; Gupta, Rajesh Kumar
€ 127.78
FREE Delivery in Ireland
Description for High-Level Verification
Paperback. The growing complexity of the design process for systems on chip (SOCs) allows the use of more demanding computing languages, with a principle goal being verification at a higher level of abstraction. This book focuses on these high-level verification methods. Num Pages: 180 pages, 6 black & white tables, biography. BIC Classification: TJFC; UGC. Category: (G) General (US: Trade). Dimension: 235 x 155 x 10. Weight in Grams: 291.
Given the growing size and heterogeneity of Systems on Chip (SOC), the design process from initial specification to chip fabrication has become increasingly complex. This growing complexity provides incentive for designers to use high-level languages such as C, SystemC, and SystemVerilog for system-level design. While a major goal of these high-level languages is to enable verification at a higher level of abstraction, allowing early exploration of system-level designs, the focus so far for validation purposes has been on traditional testing techniques such as random testing and scenario-based testing. This book focuses on high-level verification, presenting a design methodology that relies ... Read more
Given the growing size and heterogeneity of Systems on Chip (SOC), the design process from initial specification to chip fabrication has become increasingly complex. This growing complexity provides incentive for designers to use high-level languages such as C, SystemC, and SystemVerilog for system-level design. While a major goal of these high-level languages is to enable verification at a higher level of abstraction, allowing early exploration of system-level designs, the focus so far for validation purposes has been on traditional testing techniques such as random testing and scenario-based testing. This book focuses on high-level verification, presenting a design methodology that relies ... Read more
Product Details
Format
Paperback
Publication date
2014
Publisher
Springer-Verlag New York Inc. United States
Number of pages
180
Condition
New
Number of Pages
167
Place of Publication
New York, United States
ISBN
9781493901012
SKU
V9781493901012
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
Reviews for High-Level Verification