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Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Ahuja, Sumit; Lakshminarayana, Avinash; Shukla, Sandeep Kumar
€ 127.78
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Description for Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Paperback. This book presents fresh research techniques, algorithms, methodologies and experimental results for high-level power estimation and power-aware high-level synthesis. The book will help get products to market quicker and facilitate low-power ASIC/FPGA design. Num Pages: 192 pages, 23 black & white tables, biography. BIC Classification: TJFC; UGC. Category: (G) General (US: Trade). Dimension: 235 x 155 x 10. Weight in Grams: 302.
This book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design.
This book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design.
Product Details
Format
Paperback
Publication date
2014
Publisher
Springer-Verlag New York Inc. United States
Number of pages
192
Condition
New
Number of Pages
170
Place of Publication
New York, United States
ISBN
9781489987808
SKU
V9781489987808
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
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