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Rashinkar, Prakash; Paterson, Peter; Singh, Leena - System-on-a-Chip Verification - 9780792372790 - V9780792372790
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System-on-a-Chip Verification

€ 196.72
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Description for System-on-a-Chip Verification Hardback. Covers verification strategies and methodologies for SOC verification from system level verification to the design sign-off. This book contains topics including: Introduction to the SOC design and verification aspects; System level verification in brief; Block level verification; Analog/mixed signal simulation; and Simulation. Num Pages: 372 pages, 22 black & white illustrations, biography. BIC Classification: T; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 243 x 164 x 29. Weight in Grams: 796.
System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application.
System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that ... Read more

Product Details

Format
Hardback
Publication date
2000
Publisher
Kluwer Academic Publishers United States
Number of pages
372
Condition
New
Number of Pages
372
Place of Publication
Dordrecht, Netherlands
ISBN
9780792372790
SKU
V9780792372790
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15

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