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The Verilog PLI Handbook. A User's Guide and Comprehensive Reference on the Verilog Programming Language Interface.
Stuart Sutherland
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Description for The Verilog PLI Handbook. A User's Guide and Comprehensive Reference on the Verilog Programming Language Interface.
Paperback. Num Pages: 785 pages, biography. BIC Classification: THR; TJFC; UGC. Category: (G) General (US: Trade). Dimension: 235 x 155 x 41. Weight in Grams: 1223.
The Verilog Programming Language Interface, commonly called the Verilog PU, is one of the more powerful features of Verilog. The PU provides a means for both hardware designers and software engineers to interface their own programs to commercial Verilog simulators. Through this interface, a Verilog simulator can be customized to perform virtually any engineering task desired. Just a few of the common uses of the PU include interfacing Veri log simulations to C language models, adding custom graphical tools to a simulator, reading and writing proprietary file formats from within a simulation, performing test coverage analysis during simulation, and so ... Read more
Intended audience: this book is written for digital design engineers with a background in the Verilog Hardware Description Language and a fundamental knowledge of the C programming language. It is expected that thereader:- Has a basic knowledge of hardware engineering, specifically digital design of ASIC and FPGA technologies.
- Is familiar with the Verilog Hardware Description Language (HDL), and can write models of hardware circuits in Verilog, can write simulation test fixtures in Verilog, and can run at least one Verilog logic simulator.
- Knows basic C-language programming, including the use of functions, pointers, structures and file I/O. Explanations of the concepts and terminology of digital
Product Details
Format
Paperback
Publication date
1999
Publisher
Springer-Verlag New York Inc. United States
Number of pages
785
Condition
New
Number of Pages
785
Place of Publication
New York, NY, United States
ISBN
9781461372790
SKU
V9781461372790
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
About Stuart Sutherland
Mr. Stuart Sutherland is a member of the IEEE Verilog standards committee, where he is co-chair of the PLI standards task force and technical editor for the PLI sections of the IEEE 1364 Verilog Language Reference Manual. Mr. Sutherland has more than 14 years of experience in hardware design and over ten years of experience with Verilog. He is ... Read more
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