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Advanced ASIC Chip Synthesis
Himanshu Bhatnagar
€ 67.15
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Description for Advanced ASIC Chip Synthesis
Paperback. Num Pages: 284 pages, biography. BIC Classification: THR; TJFC; UGC. Category: (G) General (US: Trade). Dimension: 235 x 155 x 17. Weight in Grams: 486.
Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler® and PrimeTime® describes the advanced concepts and techniques used for ASIC chip synthesis, formal verification and static timing analysis, using the Synopsys suite of tools. In addition, the entire ASIC design flow methodology targeted for VDSM (Very-Deep-Sub-Micron) technologies is covered in detail.
The emphasis of this book is on real-time application of Synopsys tools used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for handling complex, sub-micron ASIC designs. Significance is ... Read more
Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler® and PrimeTime® describes the advanced concepts and techniques used for ASIC chip synthesis, formal verification and static timing analysis, using the Synopsys suite of tools. In addition, the entire ASIC design flow methodology targeted for VDSM (Very-Deep-Sub-Micron) technologies is covered in detail.
The emphasis of this book is on real-time application of Synopsys tools used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for handling complex, sub-micron ASIC designs. Significance is ... Read more
Product Details
Format
Paperback
Publication date
2012
Publisher
Springer-Verlag New York Inc. United States
Number of pages
284
Condition
New
Number of Pages
284
Place of Publication
New York, NY, United States
ISBN
9781461346623
SKU
V9781461346623
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
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