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Cardoso, Joao M. P.; Diniz, Pedro C. - Compilation Techniques for Reconfigurable Architectures - 9781441935106 - V9781441935106
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Compilation Techniques for Reconfigurable Architectures

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Description for Compilation Techniques for Reconfigurable Architectures Paperback. An introduction to hardware compilation and reconfigurable computing architectures, this book presents a variety of compiler code transformations and mapping techniques focusing on imperative programming languages. Num Pages: 223 pages, 88 black & white illustrations, biography. BIC Classification: TJF; UYF. Category: (P) Professional & Vocational. Dimension: 234 x 156 x 12. Weight in Grams: 367.
The extreme ?exibility of recon?gurable architectures and their performance pot- tial have made them a vehicle of choice in a wide range of computing domains, from rapid circuit prototyping to high-performance computing. The increasing availab- ity of transistors on a die has allowed the emergence of recon?gurable architectures with a large number of computing resources and interconnection topologies. To - ploit the potential of these recon?gurable architectures, programmers are forced to map their applications, typically written in high-level imperative programming l- guages, such as C or MATLAB, to hardware-oriented languages such as VHDL or Verilog. In this process, they must ... Read more

Product Details

Format
Paperback
Publication date
2010
Publisher
Springer-Verlag New York Inc. United States
Number of pages
223
Condition
New
Number of Pages
223
Place of Publication
New York, NY, United States
ISBN
9781441935106
SKU
V9781441935106
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15

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