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Sachdev, Manoj; Gyvez, Jose Pineda de - Defect-oriented Testing for Nano-metric CMOS VLSI Circuits - 9781441942852 - V9781441942852
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Defect-oriented Testing for Nano-metric CMOS VLSI Circuits

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Description for Defect-oriented Testing for Nano-metric CMOS VLSI Circuits paperback. Series: Frontiers in Electronic Testing. Num Pages: 349 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational. Dimension: 234 x 156 x 18. Weight in Grams: 539.
Defect-oriented testing methods have come a long way from a mere interesting academic exercise to a hard industrial reality. Many factors have contributed to its industrial acceptance. Traditional approaches of testing modern integrated circuits have been found to be inadequate in terms of quality and economics of test. In a globally competitive semiconductor market place, overall product quality and economics have become very important objectives. In addition, electronic systems are becoming increasingly complex and demand components of the highest possible quality. Testing in general and defect-oriented testing in particular help in realizing these objectives. For contemporary System on Chip (SoC) ... Read more

Product Details

Format
Paperback
Publication date
2010
Publisher
Springer-Verlag New York Inc. United States
Number of pages
349
Condition
New
Series
Frontiers in Electronic Testing
Number of Pages
328
Place of Publication
New York, NY, United States
ISBN
9781441942852
SKU
V9781441942852
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15

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