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Krstic, Angela; Cheng, Kwang-Ting - Delay Fault Testing for VLSI Circuits - 9780792382959 - V9780792382959
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Delay Fault Testing for VLSI Circuits

€ 189.85
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Description for Delay Fault Testing for VLSI Circuits Hardback. Presents a selection of existing delay testing research results. This book combines introductory material with techniques that address some of the problems in delay testing. It covers some basic topics such as fault modeling and test application schemes for detecting delay defects. Series: Frontiers in Electronic Testing. Num Pages: 203 pages, biography. BIC Classification: TJFD; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 12. Weight in Grams: 1050.
In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor process technology, our expectations on speed have soared. A frequently asked question in the last decade has been how fast can the clock run. This puts significant demands on timing analysis and delay testing. Fueled by the above events, a tremendous growth has occurred in the research on delay testing. Recent work includes fault models, algorithms for test generation and fault simulation, and ... Read more

Product Details

Format
Hardback
Publication date
1998
Publisher
Kluwer Academic Publishers United States
Number of pages
203
Condition
New
Series
Frontiers in Electronic Testing
Number of Pages
191
Place of Publication
Dordrecht, Netherlands
ISBN
9780792382959
SKU
V9780792382959
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15

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