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Chiang, Charles; Kawa, Jamil - Design for Manufacturability and Yield for Nano-scale Cmos - 9781402051876 - V9781402051876
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Design for Manufacturability and Yield for Nano-scale Cmos

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Description for Design for Manufacturability and Yield for Nano-scale Cmos Hardback. Walks the reader through the various aspects of manufacturability and yield in a nano-CMOS process. This book covers CAD/CAE aspects of a SOC design flow and addresses a topic (DFM/DFY) critical at 90 nm and beyond. Series: Integrated Circuits and Systems. Num Pages: 281 pages, bibliography. BIC Classification: TJFC. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 235 x 155 x 18. Weight in Grams: 680.

Design for Manufacturability and Yield for Nano-Scale CMOS walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a ... Read more

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Product Details

Format
Hardback
Publication date
2007
Publisher
Springer-Verlag New York Inc. United States
Number of pages
281
Condition
New
Series
Integrated Circuits and Systems
Number of Pages
255
Place of Publication
New York, NY, United States
ISBN
9781402051876
SKU
V9781402051876
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15

About Chiang, Charles; Kawa, Jamil
Dr. Charles Chiang is R&D Director of the Advanced Technology Group at Synopsys Inc. in Mountain View, CA, USA

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