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Low-Power Variation-Tolerant Design in Nanometer Silicon
. Ed(S): Bhunia, Swarup; Mukhopadhyay, Saibal
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Description for Low-Power Variation-Tolerant Design in Nanometer Silicon
Paperback. Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. Editor(s): Bhunia, Swarup; Mukhopadhyay, Saibal. Num Pages: 455 pages, biography. BIC Classification: TJFC; UGC. Category: (G) General (US: Trade). Dimension: 235 x 155 x 24. Weight in Grams: 694.
Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.
Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.
Product Details
Format
Paperback
Publication date
2014
Publisher
Springer-Verlag New York Inc. United States
Number of pages
455
Condition
New
Number of Pages
440
Place of Publication
New York, United States
ISBN
9781489981578
SKU
V9781489981578
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
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