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Timing Analysis and Optimization of Sequential Circuits
Maheshwari, Naresh; Sapatnekar, S.
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Description for Timing Analysis and Optimization of Sequential Circuits
Paperback. Num Pages: 190 pages, biography. BIC Classification: THR; TJFC; UGC. Category: (G) General (US: Trade). Dimension: 235 x 155 x 11. Weight in Grams: 332.
Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques to design fast, low-power chips with minimum area for increasingly complex systems, while on the economic side there is the vastly increased pressure of time-to-market. These pressures have made the use of CAD tools mandatory in designing complex systems.
Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to performance ... Read more
Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques to design fast, low-power chips with minimum area for increasingly complex systems, while on the economic side there is the vastly increased pressure of time-to-market. These pressures have made the use of CAD tools mandatory in designing complex systems.
Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to performance ... Read more
Product Details
Format
Paperback
Publication date
2012
Publisher
Springer-Verlag New York Inc. United States
Number of pages
190
Condition
New
Number of Pages
190
Place of Publication
New York, NY, United States
ISBN
9781461375791
SKU
V9781461375791
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
Reviews for Timing Analysis and Optimization of Sequential Circuits
'To sum it up it can be said that the authors have done a great job. The book is well written and can serve as a textbook for graduate students, researchers, and professionals in the area of CAD for VLSI and VLSI circuit design.' Zentral Blatt Mathematik, 987 (2002)