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Logic Synthesis for Low Power VLSI Designs
Iman, Sasan; Pedram, Massoud
€ 193.69
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Description for Logic Synthesis for Low Power VLSI Designs
Paperback. Num Pages: 236 pages, biography. BIC Classification: THR; TJFC; UYF. Category: (G) General (US: Trade). Dimension: 235 x 155 x 13. Weight in Grams: 397.
Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synthesis and optimization at the logic level. Logic Synthesis for Low Power VLSI Designs contains detailed descriptions of technology-dependent logic transformations and optimizations, technology decomposition and mapping, and post-mapping structural optimization techniques for low power. It also emphasizes the trade-off techniques for two-level and multi-level logic circuits that ... Read more
Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synthesis and optimization at the logic level. Logic Synthesis for Low Power VLSI Designs contains detailed descriptions of technology-dependent logic transformations and optimizations, technology decomposition and mapping, and post-mapping structural optimization techniques for low power. It also emphasizes the trade-off techniques for two-level and multi-level logic circuits that ... Read more
Product Details
Format
Paperback
Publication date
1997
Publisher
Springer-Verlag New York Inc. United States
Number of pages
236
Condition
New
Number of Pages
236
Place of Publication
New York, NY, United States
ISBN
9781461374909
SKU
V9781461374909
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
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