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Planar Double-gate Transistor
. Ed(S): Amara, Amara; Rozeau, Olivier
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Description for Planar Double-gate Transistor
Hardback. The aim of the editors here is to reinforce the synergy between the research activities on CMOS sub-32nm devices and the design of elementary circuits. The goal is to point out how we can apply new transistor structures to come up with new cells and concepts. Editor(s): Amara, Amara; Rozeau, Olivier. Num Pages: 211 pages, biography. BIC Classification: TJFC; TJFD3. Category: (P) Professional & Vocational. Dimension: 234 x 156 x 14. Weight in Grams: 1090.
Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called “scaling”, has highlighted serious advantages as integration density, speed, power consumption, functionality and cost. Direct consequence was the decrease of cost-per-function, so the electronic productivity has largely progressed in this period. Another usually cited trend is the evolution of the in- gration density as expressed by the well-know Moore’s Law in 1975: the number of devices per chip doubles every 2 years. This evolution has allowed improving signi?cantly the circuit complexity, offering a great computing power in the case of microprocessor, for example. ... Read more
Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called “scaling”, has highlighted serious advantages as integration density, speed, power consumption, functionality and cost. Direct consequence was the decrease of cost-per-function, so the electronic productivity has largely progressed in this period. Another usually cited trend is the evolution of the in- gration density as expressed by the well-know Moore’s Law in 1975: the number of devices per chip doubles every 2 years. This evolution has allowed improving signi?cantly the circuit complexity, offering a great computing power in the case of microprocessor, for example. ... Read more
Product Details
Format
Hardback
Publication date
2009
Publisher
Springer-Verlag New York Inc. United States
Number of pages
211
Condition
New
Number of Pages
211
Place of Publication
New York, NY, United States
ISBN
9781402093272
SKU
V9781402093272
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
About . Ed(S): Amara, Amara; Rozeau, Olivier
Prof. Amara AMARA obtained his HDR (Confirmation of Leading Research Capabilities) from Evry University, a Ph.D. in computer science in 1989 and a DEA (MSc) in 1985 in microelectronics and computer science both from Paris VI University. In 1988 he joined IBM research and development laboratory at Corbeil-Essonnes where he was involved in SRAM memory design with advanced CMOS technologies. ... Read more
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