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Pong P. Chu - Embedded SoPC Design with Nios II Processor and Verilog Examples - 9781118011034 - V9781118011034
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Embedded SoPC Design with Nios II Processor and Verilog Examples

€ 156.11
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Description for Embedded SoPC Design with Nios II Processor and Verilog Examples Hardcover. * Offers experiment problems with various levels of difficulties in the end of each chapter. * Provides Complete code listing. * Offers Multi-week projects in the end of each chapter. * Includes annotated bibliographic notes for further reading. Num Pages: 782 pages, Illustrations. BIC Classification: TJ; UK. Category: (P) Professional & Vocational. Dimension: 252 x 184 x 45. Weight in Grams: 1484.

Explores the unique hardware programmability of FPGA-based embedded systems, using a learn-by-doing approach to introduce the concepts and techniques for embedded SoPC design with Verilog

An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as well—allowing us to configure the soft-core processor, create tailored I/O interfaces, and develop specialized hardware accelerators for computation-intensive tasks.

Utilizing an Altera FPGA prototyping board and its Nios II soft-core processor, ... Read more

Emphasizing hardware design and integration throughout, the book is divided into four major parts:

  • Part I covers HDL and synthesis of custom hardware
  • Part II introduces the Nios II processor and provides an overview of embedded software development
  • Part III demonstrates the design and development of hardware and software of several complex I/O peripherals, including a PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card
  • Part IV provides several case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology

While designing and developing an embedded SoPC can be rewarding, the learning can be a long and winding journey. This book shows the trail ahead and guides readers through the initial steps to exploit the full potential of this emerging methodology.

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Product Details

Format
Hardback
Publication date
2012
Publisher
John Wiley & Sons Inc United States
Number of pages
782
Condition
New
Number of Pages
782
Place of Publication
New York, United States
ISBN
9781118011034
SKU
V9781118011034
Shipping Time
Usually ships in 7 to 11 working days
Ref
99-50

About Pong P. Chu
DR. PONG P. CHU is Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He has taught undergraduate- and graduate-level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University.

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