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High Level Synthesis of ASICs Under Timing and Synchronization Constraints
Ku, David C.; de Micheli, Giovanni
€ 200.05
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Description for High Level Synthesis of ASICs Under Timing and Synchronization Constraints
Hardback. Addresses both theoretical and practical aspects in the design of a high-level synthesis system that transforms a behavioral level description of hardware to a synchronous logic-level implementation consisting of logic gates and registers. This work also addresses specific issues in applying high-level synthesis techniques to the design of ASICs. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 294 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 19. Weight in Grams: 615.
Computer-aided synthesis of digital circuits from behavioral level specifications offers an effective means to deal with increasing complexity of digital hardware design. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses both theoretical and practical aspects in the design of a high-level synthesis system that transforms a behavioral level description of hardware to a synchronous logic-level implementation consisting of logic gates and registers.
High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses specific issues in applying high-level synthesis techniques to the design of ASICs. ... Read more
Computer-aided synthesis of digital circuits from behavioral level specifications offers an effective means to deal with increasing complexity of digital hardware design. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses both theoretical and practical aspects in the design of a high-level synthesis system that transforms a behavioral level description of hardware to a synchronous logic-level implementation consisting of logic gates and registers.
High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses specific issues in applying high-level synthesis techniques to the design of ASICs. ... Read more
Product Details
Format
Hardback
Publication date
1992
Publisher
Kluwer Academic Publishers United States
Number of pages
294
Condition
New
Series
The Springer International Series in Engineering and Computer Science
Number of Pages
294
Place of Publication
Dordrecht, Netherlands
ISBN
9780792392446
SKU
V9780792392446
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
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