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Integrated Circuit Failure Analysis
Friedrich Beck
€ 241.37
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Description for Integrated Circuit Failure Analysis
Hardcover. The construction and failure analysis of highly integrated semiconductor components has gained in significance with the explosive growth in the semiconductor industry. Once a subordinate laboratory task, semiconductor failure analysis has now become a discipline in its own right. Series: Quality and Reliability Engineering Series. Num Pages: 190 pages, index. BIC Classification: TJFC; TJFD5. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate; (XV) Technical / Manuals. Dimension: 246 x 161 x 16. Weight in Grams: 432.
Fault analysis of highly-integrated semiconductor circuits has become an indispensable discipline in the optimization of product quality. Integrated Circuit Failure Analysis describes state-of-the-art procedures for exposing suspected failure sites in semiconductor devices. The author adopts a hands-on problem-oriented approach, founded on many years of practical experience, complemented by the explanation of basic theoretical principles. Features include: Advanced methods in device preparation and technical procedures for package inspection and semiconductor reliability. Illustration of chip isolation and step-by-step delayering of chips by wet chemical and modern plasma dry etching techniques. Particular analysis of bipolar and MOS circuits, although techniques are equally relevant ... Read more
Fault analysis of highly-integrated semiconductor circuits has become an indispensable discipline in the optimization of product quality. Integrated Circuit Failure Analysis describes state-of-the-art procedures for exposing suspected failure sites in semiconductor devices. The author adopts a hands-on problem-oriented approach, founded on many years of practical experience, complemented by the explanation of basic theoretical principles. Features include: Advanced methods in device preparation and technical procedures for package inspection and semiconductor reliability. Illustration of chip isolation and step-by-step delayering of chips by wet chemical and modern plasma dry etching techniques. Particular analysis of bipolar and MOS circuits, although techniques are equally relevant ... Read more
Product Details
Format
Hardback
Publication date
1998
Publisher
John Wiley and Sons Ltd United Kingdom
Number of pages
190
Condition
New
Series
Quality and Reliability Engineering Series
Number of Pages
190
Place of Publication
New York, United States
ISBN
9780471974017
SKU
V9780471974017
Shipping Time
Usually ships in 7 to 11 working days
Ref
99-50
About Friedrich Beck
Friedrich Beck is the author of Integrated Circuit Failure Analysis: A Guide to Preparation Techniques, published by Wiley.
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