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Sandeep Saini - Low Power Interconnect Design - 9781461413226 - V9781461413226
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Low Power Interconnect Design

€ 119.30
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Description for Low Power Interconnect Design Hardcover. As well as offering practical solutions for delay and power reduction for on-chip interconnects and buses, this book provides in-depth descriptions of the problem of signal delay and extra power consumption and possible solutions for delays and glitches. Series: Lecture Notes in Electrical Engineering. Num Pages: 152 pages, 99 black & white illustrations, 12 colour illustrations, 19 black & white tables, biograp. BIC Classification: TJFC; UYF. Category: (P) Professional & Vocational. Dimension: 246 x 163 x 14. Weight in Grams: 390.
This book provides practical solutions for delay and power reduction for on-chip interconnects and buses.  It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the total system.  Coverage focuses on use of the Schmitt Trigger as an alternative approach to buffer insertion for delay and power reduction in VLSI interconnects. In the last section of the book, various bus coding techniques are discussed to minimize delay and power in address and data buses.

Product Details

Format
Hardback
Publication date
2015
Publisher
Springer-Verlag New York Inc. United States
Number of pages
200
Condition
New
Series
Lecture Notes in Electrical Engineering
Number of Pages
152
Place of Publication
New York, NY, United States
ISBN
9781461413226
SKU
V9781461413226
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15

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