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Rao, Vasant B.; Overhauser, David V.; Trick, Timothy N.; Hajj, Ibrahim N. - Switch-level Timing Simulation of MOS VLSI Circuits - 9781461289630 - V9781461289630
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Switch-level Timing Simulation of MOS VLSI Circuits

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Description for Switch-level Timing Simulation of MOS VLSI Circuits Paperback. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 210 pages, biography. BIC Classification: THR; TJFC. Category: (G) General (US: Trade). Dimension: 235 x 155 x 12. Weight in Grams: 349.
Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com­ puting that has occurred over the past several decades. Today a wide range ... Read more

Product Details

Format
Paperback
Publication date
2011
Publisher
Springer-Verlag New York Inc. United States
Number of pages
210
Condition
New
Series
The Springer International Series in Engineering and Computer Science
Number of Pages
210
Place of Publication
New York, NY, United States
ISBN
9781461289630
SKU
V9781461289630
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15

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