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System-level Design Techniques for Energy-efficient Embedded Systems
Schmitz, Marcus T.; Al-Hashimi, Bashir; Eles, Petru
€ 127.37
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Description for System-level Design Techniques for Energy-efficient Embedded Systems
Hardback. Addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. This book provides an overview of a system-level co-design flow, illustrating how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. Num Pages: 194 pages, biography. BIC Classification: TJFD1. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 235 x 155 x 14. Weight in Grams: 1080.
System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are ... Read more
System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating through examples how system performance is influenced at various steps of the flow including allocation, mapping, and scheduling. The book places special emphasis upon system-level co-synthesis techniques for architectures that contain voltage scalable processors, which can dynamically trade off between computational performance and power consumption. Throughout the book, the introduced co-synthesis techniques, which target both single-mode systems and emerging multi-mode applications, are ... Read more
Product Details
Format
Hardback
Publication date
2003
Publisher
Kluwer Academic Publishers United States
Number of pages
194
Condition
New
Number of Pages
194
Place of Publication
New York, NY, United States
ISBN
9781402077500
SKU
V9781402077500
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
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