.png){kind=logo}
Stock image for illustration purposes only - book cover, edition or condition may vary.
Timing Optimization for High-speed Digital Circuits
Kourtev, Ivan S.; Friedman, Eby G.; Taskin, Baris
€ 131.93
FREE Delivery in Ireland
Description for Timing Optimization for High-speed Digital Circuits
Hardback. This work focuses on optimizing the timing of large-scale, high-performance, digital synchronous systems. A particular emphasis is placed on algorithms for non-zero clock skew scheduling to improve the performance and reliability of VLSI circuits. Num Pages: 194 pages, biography. BIC Classification: TJFC; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate. Dimension: 234 x 156 x 14. Weight in Grams: 488.
History of the Book The last three decades have witnessed an explosive development in integrated circuit fabrication technologies. The complexities of cur rent CMOS circuits are reaching beyond the 100 nanometer feature size and multi-hundred million transistors per integrated circuit. To fully exploit this technological potential, circuit designers use sophisticated Computer-Aided Design (CAD) tools. While supporting the talents of innumerable microelectronics engineers, these CAD tools have become the enabling factor responsible for the successful design and implemen tation of thousands of high performance, large scale integrated circuits. This research monograph originated from a body of doctoral disserta tion research completed ... Read more
History of the Book The last three decades have witnessed an explosive development in integrated circuit fabrication technologies. The complexities of cur rent CMOS circuits are reaching beyond the 100 nanometer feature size and multi-hundred million transistors per integrated circuit. To fully exploit this technological potential, circuit designers use sophisticated Computer-Aided Design (CAD) tools. While supporting the talents of innumerable microelectronics engineers, these CAD tools have become the enabling factor responsible for the successful design and implemen tation of thousands of high performance, large scale integrated circuits. This research monograph originated from a body of doctoral disserta tion research completed ... Read more
Product Details
Format
Hardback
Publication date
2000
Publisher
Kluwer Academic Publishers United States
Number of pages
194
Condition
New
Number of Pages
194
Place of Publication
Dordrecht, Netherlands
ISBN
9780792377962
SKU
V9780792377962
Shipping Time
Usually ships in 15 to 20 working days
Ref
99-15
Reviews for Timing Optimization for High-speed Digital Circuits